New e-mails from Huawei engineers relating to Linux kernel growth counsel that HiSilicon – Huawei’s chip subsidiary – is prepping a brand new Kunpeng SoC with HBM (Excessive Bandwidth Reminiscence) know-how – as highlighted by Phoronix. This can doubtless be the the primary important launch from HiSilicon shortly however do not get your hopes up because it may additionally simply be a rebranded older mannequin with a slight pinch of HBM.
There are only a few CPUs with HBM. Most notably Intel’s Xeon Max (Sapphire Rapids HBM) and AMD’s customized EPYC CPUs for Microsoft are the primary ones to come back to thoughts. Subsequently, it’s a big achievement for Huawei to place out a Kunpeng chip with HBM.
Kunpeng is a collection of server SoCs from HiSilicon that have been initially designed utilizing Arm’s Cortex cores. HiSilicon later transitioned to customized Arm-based Taishan cores with the Kunpeng 920 that includes 64 such Taishan V110 cores fabricated utilizing TSMC’s 7nm course of. Plans for future variations have been spoiled in mild of US sanctions as China was and nonetheless is unable to acquire bleeding-edge nodes from TSMC – with all Chinese language chip makers reliant on SMIC. Only a few months again, a Kunpeng chip with Taishan V120 cores surfaced with performance just like AMD’s Zen 3 structure so these processors do have one thing to indicate for themselves regardless of lackluster support on desktop.
A collection of patches from Huawei has added help for an unnamed Kunpeng SoC that includes HBM within the Linux kernel. So far as public data go, HiSilicon by no means formally revealed any chip built-in with Excessive Bandwidth Reminiscence so that is certainly a brand new processor within the making. Nonetheless, the patches go over growing a driver for the Kunpeng SoC platform that gives the consumer an interface to energy the HBM on or off relying on the workload.
HiSilicon is more likely to persist with the Arm ISA but it surely may improve the growing older Taishan design, up the core counts, and enhance connectivity. So far as fabrication goes, SMIC’s 7nm is essentially the most possible candidate since nodes higher than or equal to 5nm require particular EUV machines. Whereas it’s theoretically doable to fabricate 5nm wafers with out EUV – utilizing strategies resembling SAQC (Self-Aligned Quadruple Patterning) – the identical methodology was the very motive Intel’s 10nm node suffered delays and misplaced its competitiveness towards TSMC.
Chinese language chip makers have been barred from utilizing Arm’s superior Neoverse V-series CPU cores for some time now. HiSilicon will doubtless leverage a modified model of the Armv8 ISA and even Armv9 for that matter since each architectures are not subject to the US commerce ban. It will likely be fascinating to see how these chips fare towards the likes of Granite Rapids and Turin although we suspect a one-sided battle.